This volume addresses the challenges of nano-scale VLSI design. It covers automated testing, design-for-testability (DFT), and low-power optimization. For researchers and professional designers, it provides the advanced technical knowledge required to produce high-reliability chips in the sub-10nm era.
Additional Product Info :
ISBN 10 :
1632405202
ISBN 13 :
9781632405203
Publisher :
Clanrye International
Language :
English
Dimensions :
8.5 x 0.56 x 11
Item Weight :
0.79 kg